Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits

نویسندگان

  • Harish Kriplani
  • Farid N. Najm
  • Ibrahim N. Hajj
چکیده

Excessive voltage drops in power and ground (P&G) buses of CMOS VLSI circuits can severely degrade both design reliability and performance. Maximum current estimates are needed in the circuit to accurately determine the impact of these problems. In [1], a pattern-independent, linear time algorithm (iMax) is described that is very e ective in estimating the maximum current waveforms at various contact points in the circuit. In [1], the algorithm was demonstrated for simple gate delay and current models. In this paper, we rst derive expressions for modeling delays and current waveforms for a general gate and then describe how the algorithm can be extended under more general models.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Estimation of Peak Current through CMOS VLSI Circuit Supply Lines

|We present a new approach for estimating the maximum instantaneous current through the power supply lines of CMOS VLSI circuits. Our nal goal is to determine the peak currents and voltage drops through power supply lines of real VLSI circuits within a practical time. Our approach is based on the iMax algorithm[1] of estimating the upper bound of the current, and uses an improved timed ATPG-bas...

متن کامل

Independent Maximum Current Estimation in Power and Ground Buses of CMOS VLSI Circuits: Algo-

We present a genetic-algorithm-based approach forestimating the maximum power dissipation and instanta-neous current through supply lines for CMOS circuits. Ourapproach can handle large combinational and sequentialcircuits with arbitrary but known delays. To obtain accurateresults we extract the timing and current information fromtransistor-level and general-delay gate-l...

متن کامل

A Novel Low Power Energy Efficient SRAM Cell With Reduced Power Consumption using MTCMOS Technique

In modern high performance integrated circuits, maximum of the total active mode energy is consumed due to leakage current. SRAM cell array is main source of leakage current since majority of transistor are utilized for on-chip memory in today high performance microprocessor and system on chip designs. Therefore the design of low leakage SRAM is required. Reducing power dissipation, supply volt...

متن کامل

Spice Compatible Model for Multiple Coupled Nonuniform Transmission Lines Application in Transient Analysis of VLSI Circuits

An SPICE compatible model for multiple coupled nonuniform lossless transmission lines (TL's) is presented. The method of the modeling is based on the steplines approximation of the nonuniform TLs and quasi-TEM assumptions. Using steplines approximation the system of coupled nonuniform TLs is subdivided into arbitrary large number of coupled uniform lines (steplines) with different characteristi...

متن کامل

Pattern independent maximum current estimation in power and ground buses of CMOS VLSI circuits: Algorithms, signal correlations, and their resolution

Currents owing in the power and ground (P&G) buses of CMOS digital circuits a ect both circuit reliability and performance by causing excessive voltage drops. Excessive voltage drops manifest themselves as glitches on the P&G buses and cause erroneous logic signals and degradation in switching speeds. Maximum current estimates are needed at every contact point in the buses to study the severity...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1994